- Astera Labs
- Cloud-Scale Interop
- CXL Memory Connectivity
- CXL Technology
- Smart Cable Modules
- Smart Retimers
Leo Memory Connectivity Platform: First look demo
Get your first look and an end-to-end demonstration of Astera Labs Leo Memory Connectivity Platform for CXL™ 1.1 and 2.0, the industry’s first purpose-built solution to support memory expansion, pooling and sharing.
Unlock the full potential of CXL with Leo Memory Connectivity Platform
Learn about Astera Labs Leo Memory Connectivity Platform, the industry’s first purpose-built solution to unlock the full potential of data-centric systems based on Compute Express Link™ technology.
Intel Vision 2022
Check out this demo video from Intel Vision featuring our Aries PCIe® Smart Retimers enabling robust PCIe 5.0 connectivity with KIOXIA America, Inc. SSDs and Intel Corporation’s Sapphire Rapids CPU.
Deploy Robust PCIe® 5.0 Connectivity with Aries Smart Retimers
See our Aries Smart Retimers in action via two interoperability demonstrations with key industry partners’ PCIe® 5.0 root complex and endpoints.
Astera Labs & Intel Capital
Astera Labs Co-Founders Sanjay Gajendra, Jitendra Mohan, and Casey Morrison highlight the company’s enduring partnership with Intel Capital.
Taurus Smart Cable Module™ 400GbE PAM4 Connectivity Demonstration
See a Taurus Smart Cable Module™ enabled 400GbE PAM4 Smart Electrical Cable in action with a demonstration of an end-to-end 400GbE link up passing error-free traffic as well as real-time link diagnostics.
Intel Innovation 2021: Astera Labs, Broadcom, Intel & Samsung PCI Express® 5.0 Demo
Astera Labs joined Broadcom, Intel, and Samsung at Intel Innovation 2021 to demonstrate seamless end-to-end PCI Express® (PCIe®) 5.0 interoperation at 32GT/s.
Aries CXL™ Smart Retimer Demo: CXL Ecosystem Interop with Intel and Synopsys
Industry’s first demonstration of a fully formed CXL™ link between an Intel root complex, an Aries CXL Smart Retimer and Synopsys end point IP.
Taurus Smart Cable Module™: First Look at Purpose-Built 100GbE/Lane Connectivity
Get your first look at Taurus Smart Cable Modules™ – the only “active” plus “smart” hyperscale connectivity solution that’s ready to support the jump to 100G/Lane Ethernet when you are.
Taurus Smart Cable Module™: “Active” + “Smart” 100G/Lane Ethernet Connectivity
Learn how Taurus Smart Cable Modules™ enable the hyperscale industry’s transition to 25G, 50G and 100G/Lane Ethernet for cost effective 200GbE, 400GbE and 800GbE interconnects.
Introduction to Compute Express Link™ (CXL™) Technology
Learn how CXL™ technology enables data centers to achieve higher performance through increased memory capacity and bandwidth at lower latencies.
CXL 2.0™ Overview
CXL™ 2.0 moves beyond a single node to provide breakthrough performance at larger scale and introduces single level switching, memory pooling and enhanced security mechanisms.
Aries Smart Retimer for PCIe 5.0 and CXL
Learn about Aries Smart Retimers enabling PCIe® 5.0 system level testing on Sapphire Rapids-based platforms using PCIe 4.0 endpoints and sub 10ns latency for CXL™ applications.
Astera Labs: Stellar by Design
Let’s talk about Astera Labs. Who we are, where we’re going and what we’re doing.
Complex PCIe® Topologies with Switches, SRIS Clocking & Aries Smart Retimers
Learn about PCIe® switches and why certain complex system topologies involving switches need retimers to achieve optimal link performance.
Why We Test
Interoperability testing of PCIe® retimers is critical for HPC and cloud applications to support new compute-intensive workloads – such as Artificial Intelligence (AI) and Machine Learning (ML).
Interop Testing for Enterprise NVMe SSD Deployments
Learn about some specific interop test cases required by our enterprise NVMe SSD customers.
Interop Testing for Popular Endpoints
Overview of some enterprise PCIe® 4.0 endpoints featured in the Aries PCIe Smart Retimer Interop Report and use cases that require unique test setups for specific device functionalities.
How We Test
Each Aries Smart Retimer device is put through our exhaustive testing regime that uses the latest PCIe® 4.0 systems.
Signal Integrity Challenges for PCIe® 5.0 OCP Topologies
Astera Labs explains the signal integrity challenges of PCIe® 5.0 and the corresponding OCP system design challenges, where the right balance must be found between PCB materials, connector types, and the use of signal conditioning devices for practical compute topologies.
Flywheels of Innovation
Our partnership with AWS, Intel and Six Nines is revolutionizing semiconductor development in the cloud.
Connectivity Solutions for Computation-Intensive Workloads
Astera Labs CEO discusses our collaboration with Intel Capital to accelerate deployment of connectivity solutions for computation-intensive workloads.
PCIe® 5.0 and PCIe 6.0 Overview
PCI-SIG® shares an overview of PCI Express® (PCIe®) 5.0 and PCIe 6.0 specifications, including expected performance boosts, key features, and target applications.
Aries Smart Retimer for PCIe® 4.0 and PCIe 5.0
Introducing the Aries Smart Retimer, enabling a broad variety of system topologies using PCIe® 4.0 and 5.0 technology.
Aries Smart PCIe® Retimer — Enabling PCIe 4.0 Performance on SSDs
In this demonstration Casey showcases the Aries PCIe® Smart Retimer in a PCIe 4.0 SSD application.