Sep 5, 2023
In our Interop Bulletin, we demonstrated interoperability between our Leo CXL Memory Connectivity Platform and DDR5-5600 RDIMMs from Micron, Samsung, and SK hynix.
In our Interop Bulletin, we demonstrated interoperability between our Leo CXL Memory Connectivity Platform and DDR5-5600 RDIMMs from Micron, Samsung, and SK hynix.
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Learn more about Cloud-Scale Interop Lab
Astera Labs Completes Interop Testing with 5th Gen Intel Xeon Scalable Processors
We collaborated with Intel to offer our portfolio of PCIe and CXL solutions to unleash the full potential of 5th Gen Intel Xeon Scalable processors.
Demo: Accelerating Database Performance with Leo CXL Smart Memory Controllers
This video highlights our joint demo with Supermicro and MemVerge at Flash Memory Summit. We showcased a high-performance OLTP (Online Transaction Processing) solution with CXL-attached memory. This collaboration has proven to increase transaction throughput, reduce infrastructure costs and improve user experience for popular services used every day, such as product delivery services, online bookings, online payments, and order tracking and monitoring.
Interop Testing with CXL 1.1 Host CPU’s and Popular DDR5 Memory Module
After establishing the foundation of our rigorous testing, we worked with our customers to determine the most popular memory configurations for their systems and applications, to which we’ve included in our initial interop reports. We include 64GB DDR5-4800 RDIMMs from Micron, Samsung, and SK Hynix, each of which are tested with CXL 1.1-capable CPUs from AMD and Intel.
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