Built in the cloud, for the cloud.
Industry-proven Smart Retimers for PCI Express® (PCIe) 4.0, PCIe 5.0, and Compute Express Link™ (CXL) systems.
Smart Cable Modules overcome reach, signal integrity and bandwidth utilization issues for 100G/Lane Ethernet connectivity.
CXL Memory Accelerators overcome processor memory bandwidth bottlenecks and capacity limitations for CXL 1.1/2.0 interconnects.
May 10–11, 2022
Astera Labs is featuring two demos at Intel Vision this year, in partnership with Intel, Kioxia, Broadcom and Samsung.
June 16, 2022
Astera Labs will be joining TSMC for their technology symposium with a live and virtual demo of our Aries PCIe 5.0 Smart Retimers.
June 21–22, 2022
Astera Labs is excited to join the PCI-SIG in their 30th annual developers conference at the Santa Clara Convention Center.
Astera Labs demonstrated the Aries PCIe 5.0 Smart Retimer and Taurus Ethernet Smart Cable Module™ at DesignCon 2022. See you in January at DesignCon 2023!
Explore the changes between PCIe® 4.0 and PCIe 5.0 specifications, including signal integrity and system design challenges, where the right balance must be found for practical compute topologies.
Discover solutions that address signal-integrity and channel insertion loss challenges to ensure the full potential of the increased bandwidth offered by PCIe® 4.0 and PCIe 5.0 are achieved.
Discover how to strike the right balance between PCB materials, connector types, and the use of signal conditioning devices for practical compute topologies.