Aries PCIe®/CXL® Smart Cable Modules

Multi-rack GPU clustering for AI with an
industry-first 7 meter reach over copper cables

Unleash GPU-to-GPU Clustering Across Racks

  • Extends PCIe® 5.0, PCIe 4.0, and CXL® signal reach across dense AI racks using Active Electrical Cables
  • Built on the proven track record of our widely deployed and field-tested Aries PCIe/CXL Smart DSP Retimers
  • Supports multiple form factors and configurations to accommodate diverse AI system topologies
  • COSMOS suite for performance optimization and seamless fleet management across dense AI platforms

Aries SCM Highlights

Enabling reliable PCIe/CXL for rack-to-rack connectivity

Robust Signal
Integrity

Over copper cables with flexible link bifurcation

Extended Cable
Reach By

Compared to passive DAC solutions

Enhanced Diagnostics
& Telemetry

Advanced capabilities through in-band and out-of-band management

Why Use Aries Smart Cable Modules?

Aries SCMs enable robust, easy-to-design PCIe and CXL cabling while also offering COSMOS suite of built-in advanced fleet management, security, and deep diagnostic capabilities critical to ensuring high reliability and up-time.

Robustness

  • Supported Data Rates

    32 GT/s, 16 GT/s, 8 GT/s, 5 GT/s, and 2.5 GT/s Data Rates with Automatic Link Equalization

  • Power Efficient

    Low power CMOS process and L1.0 Low-Power Mode minimizes rack power/thermal density

  • Low Latency

    Less than 10ns

  • Security

    Advanced security features help prevent malicious attacks of unauthorized firmware loading, module diagnostics access, and configurations

Ease-of-use

  • Thin Cable Gauge

    Offering thin cables in various lengths for flexible bend radius

  • Extended Reach

    Up to 7m for long reach inter-rack connectivity

  • Flexible Supply Chain

    Aries SCMs are compatible with multiple cable vendors for ease of second sourcing of active cable assemblies

  • Interop Testing

    Rigorous system testing with 50+ Endpoints and all major Root Complex

Fleet Management

  • Quick Debug

    Built-in protocol analyzer with Link state history and timestamps, full non-destructive eye scan for RX Lane margining, self-test features to minimize link downtime and accelerate fault isolation

  • Deep Diagnostics

    Firmware-driven link health monitoring to alert BMC of any possible link performance issues

Use Cases

Read more

Memory Disaggregation

Expand, pool and share memory between multiple servers to increase memory bandwidth and capacity while providing the option to reclaim stranded or under-utilized…

Videos

Ordering Information

Part NumberDocumentsPCIe Gen PCIe LanesOrderingProduction Status
PM20-5XXPortfolio BriefPCIe 5.0VariousContact UsSampling

PCIe® Retimers vs. Redrivers: Ensuring Signal Integrity for AI Infrastructure

PCIe® technology serves as the backbone of data center communication in AI infrastructure. The latest PCIe standards deliver unprecedented data transfer rates—32 GT/s with PCIe 5.0 and 64 GT/s with PCIe 6.0. However, as speeds increase, so do the challenges in maintaining clean, reliable signals over longer distances or complex paths. Higher data rates make signals more susceptible to…

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Extending Our Connectivity Leadership: Industry’s First End-to-End PCIe® over Optics Demo

The Generative AI revolution is reshaping all industries and redefining what’s possible in every aspect of our lives. Behind the scenes, the rapid pace of innovation is creating significant challenges for data center infrastructure, including:Exploding demand for AI processing resources that must be interconnected across the data center due to the need for Large Language Models to…

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The Long and Short of AI: Building Scalable Data Centers in the PCIe® 6.x Era

By Abhishek Wadhwa, Senior Field Applications Engineer The rise of artificial intelligence (AI) and Generative AI are transforming how we interact with technology. From healthcare to business efficiency and groundbreaking research, AI and Generative AI are making waves. These AI marvels rely on vast amounts of hardware and infrastructure to function. As such, data centers are undergoing…

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Astera Labs Announces Conference Call to Review Third Quarter 2024 Financial Results

SANTA CLARA, CA, U.S. – Oct. 2, 2024 – Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced that it will release its financial results for the third quarter 2024 after the close of market on Monday, Nov. 4, 2024. Astera Labs will host a corresponding conference call at 1:30 p.m. Pacific…

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Astera Labs Opens New R&D Hub in Bengaluru to Drive AI and Cloud Innovation

Dr. Shivananda Koteshwar to lead the company’s India operations and spearhead development of innovative connectivity solutions for AI and cloud infrastructureSANTA CLARA, CA, U.S. – September 11, 2024 – Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced the official opening of its…

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Astera Labs to Participate in the Deutsche Bank 2024 Technology Conference

SANTA CLARA, Calif.–Aug. 21, 2024— Astera Labs (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced that it will participate in the Deutsche Bank 2024 Technology Conference on Aug. 29, 2024. Astera Labs’ presentation is scheduled for 12:30 pm PT. A webcast of the session will be made available on Astera Labs’…

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Astera Labs’ AI Inferencing Demo with Leo CXL® Smart Memory Controllers Wins FMS Best of Show Award

Joint demo delivered 40% faster time-to-insights and 40% lower CPU utilizationAstera Labs, alongside its ecosystem partners, Supermicro and MemVerge, has won the Future of Memory and Storage (FMS) 2024 Most Innovative Technology Award. At FMS 2024, we jointly demonstrated how AI inferencing can gain significant benefits using CXL®-attached memory.Astera Labs is a second time winner,…

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Leo Interop with Intel Xeon 6 Processors

Astera Labs has completed successful interop testing between Leo CXL Smart Memory Controllers and Intel Xeon 6 Processors to deliver CXL 2.0 capabilities. The testing also validated 96GB and 128GB DDR5-4800/5600 memory modules from all major memory vendors.

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PCIe® 6.x Technology Demo with Aries 6

See a live demo of PCIe® 6.x technology with Aries 6 – the third generation of our Aries PCIe/CXL® Smart DSP Retimer family.

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AI Inferencing Demo with CXL®-Attached Memory: FMS 2024

This award-winning demo between Astera Labs, Supermicro, and MemVerge shows how AI inferencing can gain significant benefits using CXL® attached memory.

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