Aries PCIe®/CXL® Smart Cable Modules

Multi-rack GPU clustering for AI
over copper cables

Unleash GPU-to-GPU Clustering Across Racks

  • Extends PCIe® 6.0, 5.0, PCIe 4.0, and CXL® signal reach across dense AI racks using Active Electrical Cables
  • Built on the proven track record of our widely deployed and field-tested Aries PCIe/CXL Smart DSP Retimers
  • Supports multiple form factors and configurations to accommodate diverse AI system topologies
  • COSMOS suite for performance optimization and seamless fleet management across dense AI platforms

Aries SCM Highlights

Enabling reliable PCIe/CXL for rack-to-rack connectivity

Robust Signal
Integrity

Over copper cables with flexible link bifurcation

Extended Cable
Reach By

Compared to passive DAC solutions

Enhanced Diagnostics
& Telemetry

Cosmos Platform Logo – Astera Labs Developer Ecosystem for CXL Products

Advanced capabilities through in-band and out-of-band management

Why Use Aries Smart Cable Modules?

Aries SCMs enable robust, easy-to-design PCIe and CXL cabling while also offering COSMOS suite of built-in advanced fleet management, security, and deep diagnostic capabilities critical to ensuring high reliability and up-time.

Robustness

  • Supported Data Rates

    64 GT/s, 32 GT/s, 16 GT/s, 8 GT/s, 5 GT/s, and 2.5 GT/s Data Rates with Automatic Link Equalization

  • Power Efficient

    Low power CMOS process and L1.0 Low-Power Mode minimizes rack power/thermal density

  • Low Latency

    Less than 10ns

  • Security

    Advanced security features help prevent malicious attacks of unauthorized firmware loading, module diagnostics access, and configurations

Ease-of-use

  • Thin Cable Gauge

    Offering thin cables in various lengths for flexible bend radius

  • Extended Reach

    Up to 7m for long reach inter-rack PCIe connectivity

  • Flexible Supply Chain

    Aries SCMs are compatible with multiple cable vendors for ease of second sourcing of active cable assemblies and accelerated time to market

  • Interop Testing

    Rigorous system testing with 50+ Endpoints and all major Root Complex

Fleet Management

  • Quick Debug

    Built-in protocol analyzer with Link state history and timestamps, full non-destructive eye scan for RX Lane margining, self-test features to minimize link downtime and accelerate fault isolation

  • Deep Diagnostics

    Firmware-driven link health monitoring to alert BMC of any possible link performance issues

Use Cases

CXL Memory Disaggregation Diagram – Leo Smart Memory Controller Use Case Read more

Memory Disaggregation

Expand, pool and share memory between multiple servers to increase memory bandwidth and capacity while providing the option to reclaim stranded or under-utilized…

Resources

Ordering Information

Part NumberDocumentsPCIe Gen PCIe LanesOrderingProduction Status
PM30-6XXPortfolio BriefPCIe 6.xVariousContact Us Pre-Production
PM20-5XXPortfolio BriefPCIe 5.0VariousContact UsProduction

The Ecosystem of Optical Fiber-to-Chip Connectors: Building Blocks of NPO and CPO for Scale-Up AI

We’ve been framing the increasing adoption of optical connectivity for scale-up applications with a clear organizing principle: Copper where you can, optics where you must. At today’s per-lane signaling rates in rack-scale AI fabrics, “must” is moving inside the rack. The reach and loss budgets available to passive copper compress with every protocol generation, and a growing number of… Read more

Seven Years Later: 200G Ethernet Retimers vs. Redrivers

Seven years ago, I wrote about the eye-popping difference between retimers and redrivers. The central point was that a redriver boosts an impaired signal, while a retimer recovers the data, extracts the embedded clock, and retransmits a fresh copy of the data on a clean clock. That distinction is still accurate and directly influences design decisions; but it’s not the only factor!On… Read more

Advancing Standards-Based AI Fabric RAS Through Astera Labs’ COSMOS and Insyde Supervyse®

As the AI industry responds to demanding agentic and high-context inference workloads by adopting rack-scale and beyond architectures, data center operators are no longer managing a handful of high-speed links in isolation.They’re managing far larger populations of GPUs, DPUs, SSDs, FPGAs, NICs, switches, and signal conditioners in complex PCIe topologies. And these proliferating devices… Read more

Astera Labs Reports Second Quarter 2026 Financial Results

Record quarterly revenue of $392.4 million, up 27% QoQ and up 104% year-over-yearQ2 revenue strength reflects diversified growth across AI fabrics and signal conditioningQ3 revenue inflection to be driven by Scorpio™ X-Series 320-lane fabric switch production ramp SAN JOSE, CA, U.S. – August 4, 2026 – Astera Labs, Inc. (Nasdaq: ALAB), a leader in semiconductor-based connectivity… Read more

Astera Labs Expands Taurus Family with Industry’s First OCP-Standard Footprint Compatible 3.2T Smart Retimers and Smart Redrivers

Unified COSMOS stack helps customers accelerate time to market with real-time link observability and advanced diagnostic featuresNews Highlights:Expanded Taurus family adds 3.2T Ethernet Smart Retimers and Smart Redrivers for scale-up and scale-out AI infrastructure.Sampling industry-first Smart Retimers and Smart Redrivers built on the OCP Signal Conditioner Standard Footprint…. Read more

Astera Labs Expands Taiwan Operations to Accelerate Global AI Infrastructure Buildout

Expanded Cloud-Scale Interop Lab and growing engineering presence to strengthen AI system integration with leading AI platform providers and Taiwan system manufacturersTAIPEI, Taiwan—June 3, 2026—Astera Labs, Inc. (Nasdaq: ALAB), a leader in semiconductor-based connectivity solutions for rack-scale AI infrastructure, today announced a significant expansion of its Taiwan operations… Read more

Astera Labs to Host Press Conference, Live Demos, and Technical Talks at Computex 2026

TAIPEI, Taiwan, May 26, 2026—Astera Labs, Inc. (Nasdaq: ALAB), a leader in semiconductor-based connectivity solutions for rack-scale AI infrastructure, will host press and industry analysts at Computex 2026 in the company’s room at the Taipei Nangang Exhibition Center, Hall 1 (TaiNEX 1), Room 303, third floor.WHAT: Astera Labs will use its Computex program to highlight the company’s… Read more

First Look: Taurus Smart Signal Conditioners

As AI scale-up networks move to 200G per lane, signal integrity and reach extension become critical design challenges. Astera Labs solves this challenge with the introduction of its fourth generation of Taurus Smart Signal Conditioners – our new 3.2T family of Retimers and  Redrivers for on-board Ethernet, UALink™, and ESUN scale-up connectivity.Taurus is the industry’s first signal… Read more

Accelerating the NVIDIA NVLink Fusion Ecosystem: How Astera Labs and NVIDIA are Bringing the Vision to Life

Join Thad Omura and Kishore Atreya for an engaging fireside chat on the NVIDIA NVLink Fusion ecosystem. Dive into how NVLink Fusion is redefining accelerator connectivity and discover how Astera Labs is enabling the ecosystem with purpose-built, high-performance solutions. This forward-looking conversation offers valuable insights for technology leaders, architects, and anyone building the… Read more

Scorpio 320 Lane Fabric Switch Demo

For today’s AI workloads, maximizing token performance means ensuring every GPU cycle is spent computing, not waiting on data.In this video, Steven Liao demonstrates how Astera Labs’ Scorpio 320 Lane fabric switch maximizes token performance by delivering single-hop, line-rate peer-to-peer connectivity to GPUs, which eliminates data movement bottlenecks that stall GPU utilization.TThe… Read more