Aries PCIe®/CXL® Smart Cable Modules

Multi-rack GPU clustering for AI
over copper cables

Unleash GPU-to-GPU Clustering Across Racks

  • Extends PCIe® 6.0, 5.0, PCIe 4.0, and CXL® signal reach across dense AI racks using Active Electrical Cables
  • Built on the proven track record of our widely deployed and field-tested Aries PCIe/CXL Smart DSP Retimers
  • Supports multiple form factors and configurations to accommodate diverse AI system topologies
  • COSMOS suite for performance optimization and seamless fleet management across dense AI platforms

Aries SCM Highlights

Enabling reliable PCIe/CXL for rack-to-rack connectivity

Robust Signal
Integrity

Over copper cables with flexible link bifurcation

Extended Cable
Reach By

Compared to passive DAC solutions

Enhanced Diagnostics
& Telemetry

Cosmos Platform Logo – Astera Labs Developer Ecosystem for CXL Products

Advanced capabilities through in-band and out-of-band management

Why Use Aries Smart Cable Modules?

Aries SCMs enable robust, easy-to-design PCIe and CXL cabling while also offering COSMOS suite of built-in advanced fleet management, security, and deep diagnostic capabilities critical to ensuring high reliability and up-time.

Robustness

  • Supported Data Rates

    64 GT/s, 32 GT/s, 16 GT/s, 8 GT/s, 5 GT/s, and 2.5 GT/s Data Rates with Automatic Link Equalization

  • Power Efficient

    Low power CMOS process and L1.0 Low-Power Mode minimizes rack power/thermal density

  • Low Latency

    Less than 10ns

  • Security

    Advanced security features help prevent malicious attacks of unauthorized firmware loading, module diagnostics access, and configurations

Ease-of-use

  • Thin Cable Gauge

    Offering thin cables in various lengths for flexible bend radius

  • Extended Reach

    Up to 7m for long reach inter-rack PCIe connectivity

  • Flexible Supply Chain

    Aries SCMs are compatible with multiple cable vendors for ease of second sourcing of active cable assemblies and accelerated time to market

  • Interop Testing

    Rigorous system testing with 50+ Endpoints and all major Root Complex

Fleet Management

  • Quick Debug

    Built-in protocol analyzer with Link state history and timestamps, full non-destructive eye scan for RX Lane margining, self-test features to minimize link downtime and accelerate fault isolation

  • Deep Diagnostics

    Firmware-driven link health monitoring to alert BMC of any possible link performance issues

Use Cases

CXL Memory Disaggregation Diagram – Leo Smart Memory Controller Use Case Read more

Memory Disaggregation

Expand, pool and share memory between multiple servers to increase memory bandwidth and capacity while providing the option to reclaim stranded or under-utilized…

Resources

Ordering Information

Part NumberDocumentsPCIe Gen PCIe LanesOrderingProduction Status
PM30-6XXPortfolio BriefPCIe 6.xVariousContact Us Pre-Production
PM20-5XXPortfolio BriefPCIe 5.0VariousContact UsProduction

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