The explosion of data and rapid growth in specialized workloads — like artificial intelligence (AI) and machine learning — have given rise to heterogeneous computing and composable disaggregation topologies. Purpose-built connectivity solutions from Astera Labs address the performance bottlenecks in these data-centric systems.
Unlock Low-Latency Connectivity in Complex System Topologies
Astera Labs Makes it Happen
Astera Labs’ solutions are purpose-built to tackle bandwidth, capacity, and performance bottlenecks in data-centric systems. Our system-aware semiconductor products, boards and services enable robust CXL™ 1.1/2.0, PCIe® 4.0/5.0, and 100G/Lane Ethernet connectivity, providing deep diagnostics and fleet management capabilities to both system designers and cloud service providers.
Server Connectivity Backbone
High-bandwidth, low-latency interconnects for compute, storage and accelerator resources
GPUs & AI Accelerators
Robust PCIe 4.0, PCIe 5.0, and CXL connectivity between GPUs, AIPs and FPGAs in JBoG or AI-box applications
Networking
Copper-based 400G/800G Ethernet rack connectivity between server-to-switch and switch-to-switch applications
Memory
Robust disaggregated memory pooling and expansion for processors, workload accelerators, and smart I/O devices
Products & Services
Purpose-built ICs
Purpose-built silicon ICs to address connectivity bottlenecks throughout the data center
What Our Customers & Partners Say
"As a trusted technology service provider for cloud computing customers, Wistron prides itself on delivering high-quality product differentiation through genuine innovation. We are excited to partner with Astera Labs, whose PCIe Smart Retimers are purpose-built to enable robust cloud connectivity with a drop-in upgrade from PCIe 4.0 to 5.0 and an extensive list of innovative fleet management capabilities that our customers truly value.”
William Lin, President of Enterprise Business Group
Wistron
“We are very excited with the growth and expansion of Astera Labs and remain highly optimistic about the long-term potential of the company.”
Stefan Dyckerhoff, Managing Director
Sutter Hill Ventures
“We are pleased to collaborate with Astera Labs… to deliver Aries Smart Retimers to market… quickly satisfying the massive customer demand for their cloud-optimized connectivity solutions.”
Bradford Paulsen, Senior Vice President of Business Management
TSMC North America
“Arm sees CXL as a significant driver in this space, and Astera Labs’ new platform will help to address these needs in cloud and edge computing data centers using Arm®-based technology.”
John DaCosta, Senior Director, Strategic Segments
Arm
“QCT is leading the way to solve… next-generation datacenter design and operation challenges, and we are excited to partner with Astera Labs on purpose-built PCIe Smart Retimer solutions.”
Mike Yang, President
Quanta Cloud Technology
“… we’re excited to take part in Astera Labs’ Cloud-Scale Interop Lab to support Aries Smart Retimers for enterprise PCIe 4.0 system designers.”
Richard New, Vice President of Research
Western Digital
“Astera Labs’ Leo CXL Memory Accelerator Platform is an important enabler for the Intel ecosystem to implement a shared memory space between hosts and attached-devices.”
Jim Pappas, Director of Technology Initiatives
Intel
“Solutions like Astera Labs’ Leo Memory Accelerator Platform are critical to enable tighter coupling between AMD processors, accelerators and memory expansion.”
Michael Hall, Director of Customer Compatibility
AMD
“Intel is collaborating with ecosystem leaders like Astera Labs to significantly reduce PCIe and CXL interconnect latency on upcoming Intel Xeon Scalable platform code-named ‘Sapphire Rapids’ and additional platforms.”
Zane Ball, Corporate VP and General Manager Datacenter Engineering and Architecture
Intel
“Astera Labs’ innovative technology is in alignment with Intel’s strategy to accelerate processing for CPUs and purpose-built accelerators for the next generation of data-centric platforms that support emerging applications… We’re excited to be strategic investors and technology partners with Astera Labs to enable these emerging ecosystems.”
Mark Rostick, Vice President and Senior Managing Director
Intel Capital
“Astera Labs has been a valuable member to the CXL Consortium contributing its expertise in enabling connectivity for heterogeneous compute architectures. We are pleased to see Astera Labs launch its first CXL memory expansion and pooling solution to support the rapidly expanding CXL ecosystem.”
Barry McAuliffe, President
CXL Consortium
“I believe Astera Labs’ latest CXL and PCIe connectivity solutions are fundamental to realizing the full potential of Artificial Intelligence in the Cloud.”
Avigdor Willenz
Astera Labs’ Founding Investor
“The Cloud-Scale Interop Lab from Astera Labs helps ensure seamless interoperability within the latest PCIe 4.0 systems and verifies that the resulting connection can handle the rigors of enterprise operation.”
Hangu Sohn, Vice President of NAND Memory Planning
Samsung Electronics
“I want to thank Astera Labs for investing in the Toronto Region’s post-pandemic economic recovery, creating high-value jobs, and contributing to our globally recognized technology sector.”
John Tory, Mayor
City of Toronto
“Astera Labs has done a tremendous job in developing a portfolio of multiple innovative products that address critical needs of heterogeneous computing and composable disaggregation infrastructure.”
Avigdor Willenz
Astera Labs’ Founding Investor
“Intel is… leading the transition with its support for the new PCIe 5.0 specification and the announcement of Compute Express Link (CXL) technology. We are excited that Astera Labs has entered the ecosystem to develop purpose-built connectivity solutions to enable seamless adoption of these technologies.”
Amber Huffman, Intel Fellow
Intel
“… Astera Labs has been a contributor to the advancement of our specifications with its expertise of PCIe retimer technology… It is great to see Aries Smart Retimers broadly available to system developers, which will enable rapid PCIe 4.0 technology and PCIe 5.0 technology ecosystem expansion.”
Al Yanes, Chairman and President
PCI-SIG
“The GSA congratulates Astera Labs on being nominated as a finalist for the 2021 ‘Start-Up to Watch’ award… demonstrating vision and innovative application of its technology for overcoming barriers to realizing the benefits of artificial intelligence and machine learning in the cloud.”
Jodi Shelton, Co-Founder and CEO
Global Semiconductor Alliance
“Astera Labs’ Taurus Smart Cables™ play an important role in enabling intra rack connectivity based on active copper cables for the 800GbE interconnect ecosystem.”
Alan Weckel, Founder and Technology Analyst
650 Group
Connectivity Is Key to Harnessing the Data Reshaping Our World
As our appetite for creating and consuming massive amounts of data continues to grow, so too will our need for increased cloud capacity to store and analyze this data. Additionally, the server connectivity backbone for data center infrastructure needs to evolve as complex AI and ML workloads become mainstream in the cloud.
Taurus Smart Cable Modules™: An Active + Smart Approach to 200/400/800GbE
Today’s data center networks are primarily serviced by 25G/lane Ethernet technology; however, these networks are quickly moving to 50G and 100G/lane to allow hyperscalers to add additional servers and switches to their Clos Network topologies and support data-intensive workloads such as AI and Machine Learning. This rapid growth in Ethernet port speed is causing a new set of challenges for design complexity and serviceability of hyperscale architectures.
The Evolution of the In-Vehicle Network
Interconnect technologies will play an important role in the overall connected car story to meet the needs of mass data transfer within the In-Vehicle Network. We have recently seen these types of challenges and a similar evolution in enterprise data centers, where intelligent systems running data-intensive workloads — such as Artificial Intelligence and Machine Learning — have drastically increased the overall design complexity.