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Application Note
Leo Product Design Guide
This application notes describes how to complete a hardware product design using Leo CXL® Smart Memory Controllers.
Application Note
Leo Software
This application note provides an overview of the Leo firmware and software structure, operation, usage and configuration. Interactions during the system boot sequence and CXL® link configuration are also covered.
Application Note
Leo Schematic Checklist
Ensuring your design is done right the first time is top priority. This checklist will help to verify schematics follow Astera Labs’ recommended guidelines.
Application Note
Leo Trusted Platform Support
This guide provides an overview of Leo’s best-in-class security features aligned with industry specifications to ensure device and firmware integrity for trusted cloud deployment.
Application Note
Leo Advanced ECC and RAS Features
This application note provides an overview of Leo’s error correction, and Reliability, Availability and Serviceability (RAS) feaures supported by the memory subsystem, CXL® subsystem and application layer.
Application Note
Aries Self Test
Learn how to use our built-in self-test feature for diagnosing situations where a device is suspected to be damaged or non-functional.
Application Note
Aries Security and Robustness
Learn how to use our Aries Smart Retimer and associated C-SDK collateral in a system where security and robustness are critical for maximizing system performance and up-time.
Application Note
Aries RX Lane Margining
Learn how Aries supports lane margining for both timing and voltage, including an example with the Intel Lane Margining Tool (LMT).
Application Note
Aries Preset Sweep Testing
Learn how to use our Python-SDK to automatically sweep over all Transmitter preset settings to capture the bit error rate (BER), margin information, and more in a loopback configuration.
Application Note
Aries PRBS Testing
Learn how to use Aries’ built-in pseudo-random bit sequence (PRBS) pattern generators and checkers to perform physical-layer stress tests and monitor per-lane margins and bit error rate.
Application Note
Aries CScripts Testing
Learn how to use the Aries plug-in for CScripts to automate system-level tests of PCIe® Links in an Intel-based system.
Application Note
Aries Compliance Testing
Learn how to perform PCIe® Transmitter and Receiver compliance tests to ensure your system meets PCI-SIG® specifications.