Aries PCIe®/CXL® Smart DSP Retimers

Now sampling industry’s lowest power
PCIe 6.x and CXL 3.x Retimers

Gold Standard PCIe® Retimer Portfolio

Field-tested and widely deployed at all major hyperscalers & AI platform providers

  • Solves high-speed PCIe®/CXL® signal integrity challenges in AI and general purpose servers with reliable 3x reach extension
  • Purpose-built for AI and cloud infrastructure delivering high performance, low power, and seamless interoperability
  • Provides a smart connectivity backbone that is reliable, scalable and customizable for diverse cloud-scale deployments
  • Comprehensive solution complete with software suite for advanced Link, Fleet & RAS telemetry & diagnostics

Aries 6 Highlights

Seamless upgrade from 2nd generation Aries 5 utilizing industry standard footprints

Lowest Power
PCIe 6.X Retimer

Optimizes cloud infrastructure TCO & simplifies system design

Robust Signal
Integrity

64GT/s PAM4 SerDes and DSP customized for demanding AI server channels

Enhanced Diagnostics
& Telemetry

Extended capabilities through in-band and out-of-band management

Why AI & Cloud Providers Use the Aries Retimer Portfolio

Enhanced portfolio with years of learnings from cloud-scale deployments

Robustness

  • Enhanced Signal Integrity 

    Proven track record of solving high-speed PCIe/CXL signal integrity challenges with reliable 3x reach extension

  • Optimized Thermal Efficiency

    Low power Retimers with integrated heat spreader simplify platform thermal design and cooling while reducing infrastructure TCO

  • Rigorous Interop Testing

    System testing with major hosts and 50+ endpoints in our Cloud-Scale Interop Lab minimizes interoperation risk and accelerates time-to-market

Ease-of-use

  • Simple Board Design

    Small package footprint with integrated AC coupling caps and flexible clocking modes simplify routing and reduce solution size

  • Comprehensive Retimer Portfolio

    Multiple packages (8/16 lane), protocols (PCIe/CXL) and form factors (ICs/Smart Cable Modules/boards) for diverse AI & cloud

  • SW-defined Architecture 

    COSMOS with Aries software-defined architecture adjusts protocol and state transitions to support open and diverse PCIe ecosystem

Fleet Management

  • Quick Debug

    Built-in protocol analyzer with Link state history and timestamps, full non-destructive eye scan for RX Lane margining, self-test features to minimize link downtime and accelerate fault isolation

  • Deep Diagnostics

    Firmware-driven link health monitoring to alert BMC of any possible link performance issues

  • In-field Upgrade

    COSMOS software upgrades enable seamless deployment of new features into existing infrastructure in the field

Use Cases

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AI Server Head Node

Deliver high-performance, robust PCIe link connectivity with optimized thermal efficiency for CPU root complex server boards that connect to GPU baseboards…
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Modular Infrastructure

Accelerate general purpose server deployments with high performance, robust PCIe connectivity solutions in modular infrastructure based on industry standard…

Videos

Evaluation Kits

Evaluation KitImageDocumentsDescriptionMax PCIe GenPCIe LanesPack QuantityOrderingProduction Status
Equinox 6 PCIe® 6.x Riser CardEquinox 6 PCIe® 6.x Riser Cardhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Equinox_6_Retimer_CEM_AIC-Product_Brief.pdfAries 6 Smart Retimer CEM-CEM Add-in-CardPCIe 6.xx 16

1

Contact Us, https://www.asteralabs.com/contact-us/Sampling
Solstice 6 PCIe 6.x Riser CardSolstice 6 PCIe 6.x Riser Cardhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Solstice_6_Retimer_MCIO_AIC-Product_Brief.pdfAries 6 Smart Retimer CEM-MCIO Add-in-CardPCIe 6.xx 16

1

Contact Us, https://www.asteralabs.com/contact-us/Sampling
Equinox 5 PCIe® 5.0 Riser CardEquinox 5 PCIe® 5.0 Riser Cardhttps://www.asteralabs.com/wp-content/uploads/2020/11/Astera_Labs_Eclipse_Equinox_Product_Brief.pdfAries 5 Smart Retimer CEM-CEM Add-in-CardPCIe 5.0x 16

1

Contact Us, https://www.asteralabs.com/contact-us/Production
COMET-REVACOMET-REVAhttps://www.asteralabs.com/wp-content/uploads/2020/08/Astera_Labs_COMET_Product_Brief.pdfAstera Labs USB-to-I2C Communication Module

1

Contact Us, https://www.asteralabs.com/contact-us/Production

Ordering Information

Orderable Part NumberDocumentsRetimer GenerationMax PCIe GenPCIe LanesOrderingStatus
PT6082LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 6.xx 8Contact Us, https://www.asteralabs.com/product-details/PT6082LR/Sampling
PT6082LXhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 6.x / CXL 3.xx 8Contact Us, https://www.asteralabs.com/product-details/PT6082LX/Sampling
PT6162LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 6.xx 16Contact Us, https://www.asteralabs.com/product-details/PT6162LR/Sampling
PT6162LXhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 6.x / CXL 3.xx 16Contact Us, https://www.asteralabs.com/product-details/PT6162LX/Sampling
PT5082LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 5.0x 8Contact Us, https://www.asteralabs.com/product-details/PT5082LR/Sampling
PT5082LXhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 5.0 / CXL 2.0x 8Contact Us, https://www.asteralabs.com/product-details/PT5082LX/Sampling
PT5162LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 5.0x 16Contact Us, https://www.asteralabs.com/product-details/PT5162LR/Sampling
PT5162LXhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf3rdPCIe 5.0 / CXL 2.0x 16Contact Us, https://www.asteralabs.com/product-details/PT5162LX/Sampling
PT5081LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf2ndPCIe 5.0x 8Contact Us, https://www.asteralabs.com/product-details/PT5081LR/Production
PT5081LXhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf2ndPCIe 5.0 / CXL 2.0x 8Contact Us, https://www.asteralabs.com/product-details/PT5081LX/Production
PT5161LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf2ndPCIe 5.0x 16Contact Us, https://www.asteralabs.com/product-details/pt5161lr/Production
PT5161LXhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf2ndPCIe 5.0 / CXL 2.0x 16Contact Us, https://www.asteralabs.com/product-details/pt5161lx/Production
PT4080LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf1stPCIe 4.0x 8Contact Us, https://www.asteralabs.com/product-details/pt4080lr/Production
PT4161LRhttps://www.asteralabs.com/wp-content/uploads/2024/03/2402_Astera_Labs-Aries_Smart_DSP_Retimer_Family-Product_Brief.pdf1stPCIe 4.0x 16Contact Us, https://www.asteralabs.com/product-details/pt4161lr/Production

PCIe® Retimers vs. Redrivers: Ensuring Signal Integrity for AI Infrastructure

PCIe® technology serves as the backbone of data center communication in AI infrastructure. The latest PCIe standards deliver unprecedented data transfer rates—32 GT/s with PCIe 5.0 and 64 GT/s with PCIe 6.0. However, as speeds increase, so do the challenges in maintaining clean, reliable signals over longer distances or complex paths. Higher data rates make signals more susceptible to…

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The Long and Short of AI: Building Scalable Data Centers in the PCIe® 6.x Era

By Abhishek Wadhwa, Senior Field Applications Engineer The rise of artificial intelligence (AI) and Generative AI are transforming how we interact with technology. From healthcare to business efficiency and groundbreaking research, AI and Generative AI are making waves. These AI marvels rely on vast amounts of hardware and infrastructure to function. As such, data centers are undergoing…

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Astera Labs Opens New R&D Hub in Bengaluru to Drive AI and Cloud Innovation

Dr. Shivananda Koteshwar to lead the company’s India operations and spearhead development of innovative connectivity solutions for AI and cloud infrastructureSANTA CLARA, CA, U.S. – September 11, 2024 – Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced the official opening of its…

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Astera Labs to Participate in the Deutsche Bank 2024 Technology Conference

SANTA CLARA, Calif.–Aug. 21, 2024— Astera Labs (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced that it will participate in the Deutsche Bank 2024 Technology Conference on Aug. 29, 2024. Astera Labs’ presentation is scheduled for 12:30 pm PT. A webcast of the session will be made available on Astera Labs’…

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Astera Labs’ AI Inferencing Demo with Leo CXL® Smart Memory Controllers Wins FMS Best of Show Award

Joint demo delivered 40% faster time-to-insights and 40% lower CPU utilizationAstera Labs, alongside its ecosystem partners, Supermicro and MemVerge, has won the Future of Memory and Storage (FMS) 2024 Most Innovative Technology Award. At FMS 2024, we jointly demonstrated how AI inferencing can gain significant benefits using CXL®-attached memory.Astera Labs is a second time winner,…

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Astera Labs Announces Financial Results for the Second Quarter of Fiscal Year 2024

Record quarterly revenue of $76.9 million, up 18% QoQ and up 619% YoYMultiple secular trends, design wins across diverse AI platform architectures, and increasing average dollar content position the Company to outpace industry growthSANTA CLARA, CA, U.S. – August 6, 2024 – Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for cloud…

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Leo Interop with Intel Xeon 6 Processors

Astera Labs has completed successful interop testing between Leo CXL Smart Memory Controllers and Intel Xeon 6 Processors to deliver CXL 2.0 capabilities. The testing also validated 96GB and 128GB DDR5-4800/5600 memory modules from all major memory vendors.

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PCIe® 6.x Technology Demo with Aries 6

See a live demo of PCIe® 6.x technology with Aries 6 – the third generation of our Aries PCIe/CXL® Smart DSP Retimer family.

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AI Inferencing Demo with CXL®-Attached Memory: FMS 2024

This award-winning demo between Astera Labs, Supermicro, and MemVerge shows how AI inferencing can gain significant benefits using CXL® attached memory.

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