Our team values are integral to who we are and how we operate as a company.
We are intensely focused on customers' needs.
We execute in order to consistently prove our promise; on time, according to spec, and within budget.
Invent & Simplify
We innovate exponentially rather than incrementally, in everything we do.
We operate with integrity and the highest ethical standards – aiming to earn our partners' trust.
The Astera Labs team includes industry veterans with deep experience in connectivity products, protocols, customer-centric design, and high-volume manufacturing.
Chief Executive Officer, Co-Founder
Jitendra co-founded Astera Labs in 2017 with a vision to remove performance bottlenecks in data-centric systems. Jitendra has more than two decades of engineering and general management experience in identifying and solving complex technical problems in datacenter and server markets. Prior to Astera Labs, he worked as the General Manager for Texas Instruments’ High Speed Interface Business and Clocking Business. Earlier at National Semiconductor Corp, Jitendra led engineering teams in various technical leadership roles. Jitendra holds a BSEE from IIT-Bombay, an MSEE from Stanford University and over 35 granted patents. In addition to work, Jitendra enjoys outdoor activities and reading about the origins of the Universe.
Chief Business Officer, Co-Founder
Sanjay is the Chief Business Officer of Astera Labs and is responsible for the sales, marketing, product, operations and G&A functions. Sanjay has more than fifteen years of in-depth experience in marketing, product management and P&L leadership roles serving cloud, datacenter, and server customers. Prior to Astera Labs, Sanjay was the general manager of Texas’s Instrument’s High Speed Interface Business. Sanjay holds a master’s degree in engineering management from University of Colorado at Boulder. Outside work Sanjay enjoys sports, and participates in community volunteering and mentoring at local schools.
Chief Product Officer, Co-Founder
Casey leads the product organization for Astera Labs and has the responsibility for defining products and ensuring seamless integration in customer systems. Casey’s career has been centered on helping customers solve complex challenges related to high-bandwidth, low-latency data interconnects. Formerly a head of Systems and Applications Engineering at Texas Instruments, Casey has helped to enable complex system topologies for a variety of applications spanning server, storage, networking, and wireless infrastructure. Casey holds MSEE from the University of Florida, and he actively participates in community volunteering and mentoring programs in San Jose.
VP of Sales
Patrick leads the Sales and Field Applications teams for Astera Labs. Prior to joining Astera Labs, Patrick worked at Broadcom for more than 20 years in general management and sales leadership roles. Most recently, Patrick served as Vice President and Co-GM of Broadcom’s Mixed-Signal ASIC Products division. Prior to that role he worked in various sales roles of increasing responsibility culminating as Senior Vice President of Sales. Prior to Broadcom, Patrick held a variety of sales and marketing positions at Integrated Device Technology and National Semiconductor. Mr. Henderson earned a BS in Electrical Engineering from the University of California, Davis. In his free time Patrick enjoys gardening and beekeeping.
VP of ASIC Engineering
Kalyan leads the ASIC engineering organization at Astera Labs and has the responsibility for design and development of all ASIC products. Prior to joining Astera Labs, Kalyan worked in various engineering leadership roles at Pensando Systems, Cisco, Nuova Systems and 0-In Design Automation. In his career spanning more than 30 years, Kalyan worked across various engineering disciplines including architecture, design, verification and software, consistently delivering innovative solutions for complex customer problems. Kalyan holds a Masters in Technology from the University of Hyderabad, India. Outside of work, Kalyan is an avid runner and likes running marathons.
VP of Hardware Engineering
Aleksandr leads the hardware engineering organization at Astera Labs and has the responsibility for design and development of system and board level connectivity solutions for data-centric applications operations. Aleks has over 20 years of experience in engineering and technical management with a proven track record in driving innovation in hardware engineering in cloud and data center markets. He was one of the early employees at Arista Networks and Insieme Networks where he drove hardware development for data center switches. He has also held leadership roles driving hardware development and evaluating emerging technologies at Cisco, Zoox and Deutsche Bank Labs. Aleks holds MS in Computer Engineering from University of Michigan and MBA from University of California at Berkeley. Outside of work, Aleks is passionate about autonomous driving and race cars.
Chief Financial Officer
Mike is the Chief Financial Officer for Astera Labs. A semiconductor industry veteran, Mike has served as CFO of several companies like Annapurna Labs, Netlogic MicroSystems, Marvell Technology and Galileo Technology and has led numerous mergers, acquisitions, and IPO during his tenure. Most recently, Mike was the CFO at Annapurna Labs, a semiconductor company had had a successful liquidity event in 2015. Prior to that Mike served as the Vice President of Finance and CFO of NetLogic MicroSystems, Inc, a publicly traded semiconductor company, that saw over 400% revenue growth during Mike’s tenure, five successful acquisitions, and the sale of NetLogic to Broadcom Corporation for $3.7 billion. Prior to joining NetLogic, Mike was the Vice President and Interim CFO of Marvell Technology Ltd ,and CFO of Galileo Technology. Mike graduated from California Polytechnic State University, San Luis Obispo with honors. He also is a Founder Circle’s member of the Cal Poly Center for Innovation & Entrepreneurship.
VP of Human Resources
Kush is the VP of Human Resources for Astera Labs and is responsible for people and culture at the company. He also has additional responsibility of driving execution of company’s strategic initiatives. Prior to joining Astera Labs, Kush led human resources function for the embedded processing business division of Texas Instruments. During his decade long tenure at Texas Instruments, Kush led HR for various businesses and was also closely involved with integrating National Semiconductor team post its acquisition by TI. Earlier, he worked in HR leadership roles in Alcatel Lucent and Citibank and earned his MBA from XLRI, in Jamshedpur, India. Outside of his work at Astera Labs, Kush is a certified coach and provides leadership coaching to students at University of Texas.
VP of Legal
Phil is VP of Legal for Astera Labs and is responsible for the company’s legal and compliance functions. Prior to joining Astera Labs, he was General Counsel and Corporate Secretary at Innovium, Inc., a network switch silicon provider for the data center market. During his tenure at Innovium, Phil oversaw multiple venture financings, negotiated commercial agreements with the company’s most important customers, favorably settled bet-the-company litigation, oversaw creation of a robust IP portfolio, and ultimately led the company through its $1.1B acquisition by Marvell Technology, Inc. Prior to becoming an attorney, Phil spent more than ten years on active duty as a Navy pilot. Outside of work, he is a college admissions representative for the United States Naval Academy and enjoys swimming, biking, and running. Phil earned a JD/MBA from Stanford Law School and the Stanford Graduate School of Business.
VP & GM of the Data Connectivity Business Unit
Richard Ward is VP and GM of the Data Connectivity Group at Astera Labs, focusing on growth and business development for the Aries and Taurus PCIe/CXL smart retimer and cable module range, and new next generation technologies. With over 30 years IC and system experience Richard has held design, systems, applications, management, marketing, and strategic development roles at Intel Silicon Photonics, Inphi and Texas Instruments. He is the editor for the 3.2Tb/s Co-Packaged Optical Transceiver at the Optical Internetworking Forum (OIF) and edited previous electro-optical components and holds a handful of patents on high speed SerDes and high performance circuit techniques. Outside of work Richard is an endurance runner and enjoys 100k and 100 mile single stage trail/mountain runs or multi-day stage races around the world.
VP & GM of the Memory Connectivity Business Unit
Sanjay brings more than 25 years of rich experience in the semiconductor industry across architecture, development, marketing, strategy, and P&L functions. Most recently Sanjay worked at Rambus, where he spearheaded the formation of CXL business unit. Sanjay was responsible for product definition, establishing engineering and marketing teams and driving sales and business development for the business unit. Previously, he worked in various business, marketing and development roles across Global Foundries, Xilinx, Altera, Xaqti (networking startup) and LSI Logic. Sanjay holds a BS in ECE from India and MS in EE from Oklahoma State University. He has completed the Executive MBA program from the Stanford School of Business. In his spare time, he enjoys spending time with his wife and two children, volunteering in the community, playing basketball, hiking, and traveling.
Astera Labs Believes in Giving Back
The Astera Labs team is dedicated to helping local community groups, and in preparing the next generation for careers in technology fields.