“I am excited to welcome Jack to our board,” said Jitendra Mohan, CEO, Astera Labs. “His leadership experience in the semiconductor industry at both private and public companies and his valued insights as a seasoned board member will help us with the next phase of our company. I look forward to working with him and our board as we scale for growth.”

“Astera Labs continues to surpass every milestone for a technology start-up, and we are now deep into the next stage of evolution for our company as we accelerate growth,” said Jitendra Mohan, CEO, Astera Labs. “This latest funding round is a testament that we are not only invested in the right growth markets such as Cloud, Artificial Intelligence/Machine Learning, and Hyperscale infrastructure, but that we are also able to consistently execute and deliver breakthrough connectivity products that are critical to our customers and partners.”

Join Astera Labs at Supercomputing 2022 (SC22) November 13-18 in Dallas to see live demonstrations of our innovative product portfolio with multiple partners as we take CXL from promise to reality with real silicon on customer platforms. This year the spotlight is on our Leo Memory Connectivity Platform — the industry’s first purpose-built CXL platform to support memory expansion, memory pooling and memory sharing.

“Our Leo Memory Connectivity Platform and Aries Smart Retimer for CXL is purpose-built with a low-latency, high-bandwidth architecture targeting AI/ML workloads and in-memory database applications for cloud-scale deployment, Sanjay Gajendra, chief business officer, Astera Labs, said. “We value our strategic collaboration with AMD as we work together to deliver performant and reliable CXL solutions for our mutual customers today and continue to innovate and meet the needs of future data centers.”

“We are honored to be a finalist for GSA’s Most Respected Private Semiconductor Company Award and the recognition of our success by our peers in the semiconductor industry,” Jitendra Mohan, CEO, Astera Labs, said. “Our team is critical to Astera Labs’ success, executing with conviction to meet our commitments to all stakeholders and achieve our company’s vision to be the trusted partner to remove performance bottlenecks throughout the data center.”

“Astera Labs has officially moved CXL beyond promise to reality with real silicon running real workloads on real customer platforms that are ready for real-world deployment,” said Sanjay Gajendra, CBO, Astera Labs. “We are excited to join OCP Global Summit with our partners as we innovate together to display the performance capabilities of our Leo Memory Connectivity Platform and Aries Smart Retimers that are solving memory and data connectivity bottlenecks in the data center today.”

“We are in a tremendous growth phase in every aspect of our business and the new Astera Labs Vancouver location will be instrumental in driving our continued expansion as a company and as the industry leader in advanced data and memory connectivity,” said Sanjay Gajendra, chief business officer, Astera Labs. “We thank Mayor Mike Hurley and the City of Burnaby for its extraordinary support in getting this new office off the ground, which will accelerate our vision to enable the true potential of AI and Machine Learning in the cloud with our purpose-built intelligent connectivity solutions.”

Astera Labs welcomes the Mayor of Burnaby and the Burnaby Board of Trade President and CEO to celebrate the grand opening of its new state-of-the-art design center and lab in the Greater Vancouver Area.

“Our Leo Memory Connectivity Platform for CXL 1.1 and 2.0 is purpose-built to overcome processor memory bandwidth bottlenecks and capacity limitations in accelerated and intelligent infrastructure,” said Jitendra Mohan, CEO, Astera Labs. “Successful delivery of Leo Smart Memory Controllers, Leo-based hardware board solutions and comprehensive software tools to our partners and customers represents a significant industry-first milestone by paving the way for a seamless, at-scale deployment of memory pooling and expansion in the Cloud.”

“The new CXL 3.0 Specification doubles bandwidth, enhances fabric management, and expands the scale of heterogenous compute, resulting in significant optimizations for AI and Machine Learning. Astera Labs is proud to collaborate with the CXL Consortium in the development of the new specification and we look forward to leveraging CXL 3.0 to expand our portfolio of purpose-built connectivity solutions.”

Jitendra Mohan, CEO, Astera Labs