“With our expansion into the CXL ecosystem, Astera Labs is taking another giant leap to provide purpose-built solutions that unlock complex heterogeneous compute and composable disaggregation system topologies,” said Jitendra Mohan, CEO, Astera Labs. “The Aries CXL Smart Retimer portfolio builds upon our established industry leadership in PCI Express® (PCIe®) 4.0 and 5.0 interconnects and provides a seamless path to enable new workload-optimized platforms.”

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“Production release of PT4161L x16 PCIe 4.0 Smart Retimers and active sampling of pin-compatible PT5161L x16 PCIe 5.0 Smart Retimers is a critical milestone for the industry, clearing the way for wide deployment of PCIe solutions,” said Jitendra Mohan, CEO, Astera Labs. “Alongside our products, we are unveiling our Cloud-Scale Interop Lab service which provides the necessary testing infrastructure to our customers to ensure seamless interoperation and robust designs of their PCIe 4.0 and PCIe 5.0 systems.”

“We are very proud of the significant industry traction for our Aries Smart Retimer Portfolio which has been extensively tested with all major CPU, GPU and PCIe 4.0 endpoints,” said Jitendra Mohan, CEO, Astera Labs. “We look forward to accelerating this momentum by partnering with such a distinguished group of technology and manufacturing heavyweights to develop purpose-built connectivity solutions for data-centric systems.“

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“Astera Labs’ Aries Smart Retimer is the industry’s first 32GT/s retimer SoC designed to the PCIe 5.0 specification. It doubles the signal reach and achieves plug-and-play interoperation without compromising interconnect topologies even at 32 GT/s speeds.”

“Rather than taking an incremental approach to adding bandwidth capabilities, we took a ground-up approach to optimize our Retimers for workload-optimized platforms that demand low latency and cloud-scale management capabilities. Built in the cloud, for the cloud, with our Aries portfolio we are pioneering PCIe Smart Retimer solutions for the industry.”

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“Astera Labs successfully utilized Avery’s Peripheral Component Interconnect PCI Express® (PCIe®) 5.0 Verification IP and services to verify its breakthrough system-aware PCIe 5.0 Smart Retimer.”

“Heterogeneous computing and workload-optimized platforms are redefining the connectivity backbone in the next generation of servers. Specialized semiconductors will help enable this high-speed connectivity backbone and accelerate technology adoption.”