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Complex PCIe® Topologies with Switches, SRIS Clocking & Aries Smart Retimers

 

Learn about PCIe® switches and why certain complex system topologies involving switches need retimers to achieve optimal link performance.

Interop Bulletin #3 explores the topic of PCIe® switches and reviews why certain complex system topologies involving switches need retimers to achieve optimal link performance.

Specifically, we demonstrate how Aries PCIe Smart Retimers support SRIS to ensure proper PCIe 4.0 data speeds in a scenario that includes a CPU to a retimer card to a switch within a JBOF.

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