Nov 9, 2022
Astera Labs and AMD have been jointly innovating to take CXL from concept to reality. Together, we are delivering real silicon that runs real workloads. In this video, we take you to the lab to watch a live demonstration of the Leo Memory Connectivity Platform and 4th Gen AMD EPYC™ Processors.
Astera Labs and AMD collaborate to help realize the vision of AI and Machine Learning in the Cloud with 4th Gen AMD EPYC™ Processors
Learn more about CXL™ Technology
Demo: CXL Memory Pooling
The industry’s first CXL memory pooling solution to reduce memory stranding, optimize memory utilization and reduce TCO for cloud servers from Astera Labs.
CXL from Promise to Reality with Real Silicon on Customer Platforms
Astera Labs is developing purpose-built data and memory connectivity solutions that remove performance bottlenecks throughout the data center. Our silicon, software, and systems-level solutions based on CXL, PCIe and Ethernet technologies are helping our customers realize the vision of Artificial Intelligence and Machine Learning in the Cloud.
Leo Memory Connectivity Platform: First look demo
Get your first look and an end-to-end demonstration of Astera Labs Leo Memory Connectivity Platform for CXL™ 1.1 and 2.0, the industry’s first purpose-built solution to support memory expansion, pooling and sharing.
Ready to find out more?
Contact us for more information about how you can design with confidence and accelerate your time to market.