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Home » Videos » CXL Memory Connectivity » Astera Labs Advances CXL Technology Ecosystem

Astera Labs Advances CXL Technology Ecosystem

Home » Videos » CXL Memory Connectivity » Astera Labs Advances CXL Technology Ecosystem

Astera Labs Advances CXL Technology Ecosystem

November 9, 2022 by

Nov 9, 2022

Astera Labs and AMD have been jointly innovating to take CXL from concept to reality. Together, we are delivering real silicon that runs real workloads. In this video, we take you to the lab to watch a live demonstration of the Leo Memory Connectivity Platform and 4th Gen AMD EPYC™ Processors.

Astera Labs and AMD collaborate to help realize the vision of AI and Machine Learning in the Cloud with 4th Gen AMD EPYC™ Processors

Related Links
CXL Memory Platform
Leo CXL Memory Connectivity Platform

Learn more about CXL™ Technology

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Demo: CXL Memory Pooling

The industry’s first CXL memory pooling solution to reduce memory stranding, optimize memory utilization and reduce TCO for cloud servers from Astera Labs.

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CXL from Promise to Reality with Real Silicon on Customer Platforms

Astera Labs is developing purpose-built data and memory connectivity solutions that remove performance bottlenecks throughout the data center. Our silicon, software, and systems-level solutions based on CXL, PCIe and Ethernet technologies are helping our customers realize the vision of Artificial Intelligence and Machine Learning in the Cloud.

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Leo Memory Connectivity Platform: First look demo

Get your first look and an end-to-end demonstration of Astera Labs Leo Memory Connectivity Platform for CXL™ 1.1 and 2.0, the industry’s first purpose-built solution to support memory expansion, pooling and sharing.

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Unlock the full potential of CXL with Leo Memory Connectivity Platform

Learn about Astera Labs Leo Memory Connectivity Platform, the industry’s first purpose-built solution to unlock the full potential of data-centric systems based on Compute Express Link™ technology.

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Filed Under: CXL Memory Connectivity

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