Nov 9, 2022
Astera Labs and AMD have been jointly innovating to take CXL from concept to reality. Together, we are delivering real silicon that runs real workloads. In this video, we take you to the lab to watch a live demonstration of the Leo Memory Connectivity Platform and 4th Gen AMD EPYC™ Processors.
Learn more about CXL™ Technology
Unprecedented Scale for Cloud and AI Infrastructure at OCP Global Summit 2023
At OCP Global Summit, we showcased how our PCIe, CXL, and Ethernet connectivity solutions deliver unprecedented reach, unprecedented memory capacity and bandwidth, and unprecedented flexibility.
Leo Memory Connectivity Platform Breaks Through the Memory Wall
At Intel Innovation this year, we showcased how Astera Labs is the first to break through the memory wall! Our Leo CXL Smart Memory Controllers are the industry’s highest performance controllers on the market, and combined with 5th Gen Intel Xeon Scalable Processors, Leo enables unprecedented performance by increasing memory bandwidth and capacity by 50%.
Industry’s First CXL 2.0 RAS Capabilities Demo
At Flash Memory Summit 2023, we demonstrated the CXL 2.0 RAS capabilities of our Leo Memory Connectivity Platform.
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