AI Accelerator Baseboard

Deliver high-performance, robust PCIe link connectivity with optimized thermal efficiency in Universal Baseboard (UBB) designs

UBB Specification Background: As AI models grow in complexity, the demand for larger scale AI systems with distributed processing across multiple GPUs intensifies. To meet this challenge, the Open Compute Project (OCP) community introduced a modular UBB to enable flexible and scalable GPU system configurations while addressing the need for efficient heat dissipation.


Requirements and Challenges​

  • PCIe connectivity in AI systems with multiple connectors and high insertion loss presents significant signal integrity and link stability challenges that must be addressed for maximum system uptime
  • Complex and large-scale clusters with multiple devices physically located far apart introduce stringent PCB layout, power and thermal design constraints
  • Cloud-scale deployments require flexible solutions with software configurability for customized integration into diagnostics and infrastructure management
  • Dense PCIe links between multiple GPUs, CPU root complexes, switches, and other endpoints present risks in system design and data center deployment without rigorous interoperability testing

Aries Smart DSP Retimer Benefits​

  • Purpose-built for demanding AI server channels and delivers robust signal integrity and link stability over long distances for dense GPU baseboards with multiple high-speed connectors 
  • Low latency with a compact footprint for optimized performance, power consumption and thermal efficiency provides system designers flexibility to create PCB layouts that adhere to stringent requirements 
  • Real-time lane, link and device health monitoring and management features with Astera Labs’ COSMOS suite that provides comprehensive diagnostics and advanced Link, Fleet and RAS management for cloud-scale deployments 
  • Rigorously tested for interoperability in our Cloud-Scale Interop Lab with leading GPU, CPU, PCIe switch, network, and storage endpoints to minimize deployment risk and accelerate time-to-market 


Orderable Part NumberDocumentsRetimer GenerationMax PCIe GenPCIe LanesOrderingStatus
PT6082LR 6.xx 8Contact Us,
PT6082LX 6.x / CXL 3.xx 8Contact Us,
PT6162LR 6.xx 16Contact Us,
PT6162LX 6.x / CXL 3.xx 16Contact Us,
PT5082LR 5.0x 8Contact Us,
PT5082LX 5.0 / CXL 2.0x 8Contact Us,
PT5162LR 5.0x 16Contact Us,
PT5162LX 5.0 / CXL 2.0x 16Contact Us,
PT5081LR 5.0x 8Contact Us,
PT5081LX 5.0 / CXL 2.0x 8Contact Us,
PT5161LR 5.0x 16Contact Us,
PT5161LX 5.0 / CXL 2.0x 16Contact Us,
PT4080LR 4.0x 8Contact Us,
PT4161LR 4.0x 16Contact Us,