5 Factors at a Glance:
- AI workloads are pushing infrastructure from copper toward optics for greater speed.
- Higher data rates shrink achievable reach, straining passive copper.
- Optics extend reach and speed but add real power and cooling demands.
- Copper can help control cost, but optics become unavoidable past a point.
- Bigger clusters incur physical demands like longer cable runs and cooling overhead.
Tech industry press (and hardware company marketing) can make it seem like AI infrastructure is rushing headlong into an optical transition with no turning back. The oversimplified version of the narrative you’re likely to hear goes: “AI needs, and will continue to need, speeds faster than copper can support. Optics must be the future.” This story isn’t exactly inaccurate, but it is incomplete.
AI systems designers are never just optimizing for speed in a vacuum. The real decision hyperscalers face when architecting at rack-scale and beyond is a multi-factor optimization problem that spans signal reach, signal speed, power demands, and physical space and mechanical constraints — all filtered through the lens of total cost of ownership (TCO). Hyperscalers need to hit the speed and performance benchmarks their AI model lab customers demand while managing the equipment costs and power/cooling overhead that come with every architectural choice they make.
When we look at how these factors intersect, a much clearer picture emerges of increasingly sophisticated hybrid architectures where copper and optical connectivity coexist, each intentionally deployed where it performs best. Below, I break down the five factors driving the decisions that determine these architectures, and in doing so provide a more accurate frame for the “optical transition” story.
Factor 1: Speed
Speed is a function of both data rate and latency. It may not be the only factor, but it is useful to frame it as the primary driver — and it all starts with the workloads.
Frontier models and emerging use cases, from Mythos-class models to the growing sophistication of agentic coding assistants like Claude Code, are pushing scale-up fabrics toward GPU cluster sizes of 72 and, eventually, 144 accelerators in a single domain. These workloads are inherently bandwidth-hungry and latency-intolerant: Distributed training and inference at this scale depend on tightly synchronized collective operations across the fabric, and any bottleneck in interconnect bandwidth translates directly into wasted GPU cycles and cluster underutilization.
The industry’s signal roadmap reflects this pressure in terms of both data rates and latency. As protocols evolve from rates of 112G to 224G per lane and beyond, each generational jump compresses the margin available to any given physical layer, whether copper or optical. There is a real tipping point in this trajectory, a 400G/lane threshold at which copper’s signal integrity characteristics become fundamentally harder to sustain economically at scale.
While there isn’t an inherent latency gap between copper and optical as connectivity materials, active or retimed solutions do incur additional latency compared to passive or linear links. So while active copper may be sufficient to close a difficult channel, a designer seeking the highest speed solution – without an additional hop of latency – may still opt for optics.
Speed alone doesn’t dictate the interconnect choice, but it does set constraints that every other factor has to work within.
Factor 2: Reach
Speed and reach are inseparable in any real system design, and this optimization pair defines the concept of a link budget. As data rates climb, the achievable reach at a given bit error rate shrinks, and insertion loss, crosstalk, and reflections all become harder to manage within an acceptable power and cost envelope.
PCIe 6.0 running PAM4 signaling is a useful illustration of just how tight this budget gets. At these speeds, channel loss and jitter budgets leave very little margin for error, and the physical reach a passive copper channel can support drops sharply relative to prior generations. AI infrastructure intensifies this classic optimization problem because both variables are getting more challenging to manage at the same time: Data rates are increasing generation over generation, and the physical footprint of the systems that need to communicate is expanding right along with cluster size. Copper solutions that were entirely workable for chip-to-chip or board-to-board interconnect at lower speeds become unworkable once you need to span a tray, a chassis, a rack, or a cluster at 224G and above.
Factor 3: Power
Optics can solve the reach problem, but they don’t solve it for free. Optical modules and transceivers, whether pluggable, linear pluggable (LPO), near-package (NPO), or co-packaged (CPO), carry a materially higher power overhead than an equivalent-reach passive copper channel, driven by the laser, modulator, and associated DSP or driver circuitry required to convert electrical signals to light and back again.
At the scale of a modern AI cluster, where power delivery and thermal design are already the binding constraints on rack density, this overhead really matters. Multiply a few extra watts per optical link across tens of thousands of links in a large deployment and the aggregate power and cooling burden can get unmanageable in a hurry. This is precisely why optics can’t be deployed universally as a default connectivity layer but rather must be deployed tactically, applied specifically where reach or speed requirements leave no viable copper alternative rather than swapped in wholesale across an architecture.
Factor 4: Cost
Cost tracks power closely, but it’s worth calling out as its own factor because it shapes deployment decisions even where power and thermal budgets have headroom. Optical connectivity remains a meaningfully more expensive solution per link than copper, both in BOM cost and, depending on the technology, in serviceability and repairability overhead. Deploying optics where copper would suffice is an expensive overdesign — and copper, at shorter reaches and appropriate data rates, still fully satisfies a large share of the links in even the most advanced AI racks.
The general principle we’ve been preaching for the optical transition is simply: Copper where you can, optics where you must.
The complicating factor is that the category of “must” is evolving with every new protocol generation and every incremental increase in customer speed demands, as the reach achievable by passive and even active copper solutions continues to compress. After that tipping point, the costs associated with upgrading to optics are simply the cost of doing business in the AI space.
There’s a second layer of cost optimization embedded within the optical decision itself as well. Different optical technologies carry different cost profiles: CPO, for instance, offers power and density advantages but comes with materially higher repairability costs than NPO, since a failed co-packaged optical engine can mean replacing or reworking the entire package rather than swapping a discrete module. Choosing among LPO, NPO, and CPO is itself a nested optimization problem layered on top of the broader copper-versus-optical decision.
Factor 5: Physical Space Demands
Physical space is the factor most often left out of theoretical system designs, but it’s impossible to ignore once you try to build a rack that actually works. Cluster scale-up doesn’t just increase electrical and thermal demands, it increases the physical distances that connectivity has to span, from tray to chassis to rack to row, and it incurs additional mechanical constraints like cooling overhead.
We’ve written about these mechanical factors directly in the context of passive copper’s limits at 224G-per-lane rack-scale designs, where cable width and bend radius impact the physical envelope of cables within a roughly 1.2-meter envelope. As GPU count per fabric grows toward those 72- and 144-accelerator clusters that next-generation workloads demand, the physical footprint of the system grows with it. More GPUs mean more physical space consumed at the tray, rack, and row level; this leads to longer cable runs needed to connect them and, consequently, even greater signal reach requirements at a given data rate. Those climbing reach requirements eventually force optics into the connectivity mix, and at that point physical factors like packaging architecture and pluggable transceivers become part of the conversation.
“AI Your Way” Means an Intelligent Approach to Optical Transition
Taken together, these five factors — speed, reach, power, cost, and physical space — make clear that the copper-to-optical transition isn’t a single lever being pulled across the industry. It’s an ongoing, link-by-link optimization that hyperscalers and their AI model lab customers are working through generation by generation, and the right answer looks different depending on where in the fabric you’re looking: intra-tray, intra-rack, or row-and-pod scale.
Optics are a vital part of the connectivity mix going forward, and they’re a core part of our product roadmap for purpose-built AI infrastructure. But speed isn’t the only variable worth optimizing for, and we’re committed to the idea that optics should be used tactically and with precision, not a universal replacement for copper.
Think of our optical strategy as “AI Your Way” in practice: Rather than pushing customers toward a single interconnect philosophy, we build copper and optical building blocks that hyperscalers can combine to construct the architecture that’s optimal for their specific workload, reach, power, cost, and space constraints.
For great example of our recent optical developments, read about our demonstration of high-density, low-latency linear pluggable optical connectivity to Scorpio X-Series at Computex 2026. By combining our highest-radix fabric switch with linear optical connectivity, we’re paving the way for NPO and CPO solutions with significant link density gains over more physically constrained contemporary infrastructures. It’s a powerful option that creates real architectural flexibility for hyperscalers optimizing at rack-scale through an ongoing time of transition.