Aries PCIe® Smart Gearbox

Now sampling industry’s first purpose-built PCIe Gearbox

Download Portfolio Brief

Industry’s first PCIe® 6 Gearbox Portfolio

Intelligently bridges the performance gap between cutting-edge PCIe 6 and established PCIe 5 ecosystems for maximum data throughput

  • Solves bandwidth bottlenecks that arise when integrating the latest PCIe 6 with existing PCIe 5 infrastructure
  • Optimizes PCIe lane utilization and reach-extension for demanding AI workloads and cloud-scale deployments
  • Ensures a reliable, scalable, and customizable interconnect solution for diverse cloud environments, maximizing I/O bandwidth
  • Comprehensive solution, complete with COSMOS software suite for advanced Link, Fleet & RAS telemetry & diagnostics

Gearbox Highlights

Bridging multi-generational PCIe ecosystem

Increase effective CPU or GPU lanes by

When attaching PCIe 6 devices with PCIe 5 devices, reducing TCO

Robust Signal
Integrity

64GT/s PAM4 SerDes and DSP customized for demanding AI server channels

Enhanced Diagnostics
& Telemetry

Extended capabilities through in-band and out-of-band management

Why Use Aries Gearbox

Enhanced portfolio with years of learnings from cloud-scale deployments

Maximize Throughput

  • Flexible Protocol

    Supports a comprehensive range of PCIe rates (64 GT/s to 2.5 GT/s) ensuring full utilization of all available PCIe lanes in mixed-generation setups.

  • Seamless Protocol Translation

    Enables efficient 1-to-1 communication between the latest PCIe 6 (Flit-Mode) and older PCIe 5 (Non-Flit-Mode) devices, ensuring maximum data transfer rates are maintained across the interconnected ecosystem.

  • Extended Reach

    Advanced long-reach SerDes maintains signal integrity and performance across high-loss channels, maximizing bandwidth over extended distances.

Quick Deploy

  • Purpose-built Design

    Small package footprint with flexible clocking modes simplify routing and reduce solution size

  • Quick Debug

    Built-in protocol analyzer with Link state history and timestamps, full non-destructive eye scan for RX Lane margining, self-test features to minimize link downtime and accelerate fault isolation

  • SW-defined Architecture 

    COSMOS with Aries software-defined architecture adjusts protocol and state transitions to support open and diverse PCIe ecosystem

Increase Uptime

  • Deep Diagnostics

    Advanced Error Reporting (AER) and FW driven link health monitoring to alert system of any possible link performance issues

  • Robust Error Handling

    Integrates Host and Downstream Port Containment (DPC) and hardware interrupt generation for uncorrectable errors, ensuring link stability and data integrity

  • In-field Upgrade

    COSMOS software upgrades enable seamless deployment of new features into existing infrastructure in the field

Use Cases

Resources

Ordering Information

Orderable Part NumberDocumentsFrom (Lanes @PCIe Gen)To (Lanes @PCIe Gen)Total LanesOrderingStatus
PG60161LRPortfolio Brief8L @ PCIe 6
8L @ PCIe 5
8L @ PCIe 4		16L @ PCIe 5
16L @ PCIe 4
16L @ PCIe 3		24Contact UsSampling
PG60321LRPortfolio Brief8+8L @ PCIe 6
8+8L @ PCIe 5
8+8L @ PCIe 4		16+16L @ PCIe 5
16+16L @ PCIe 4
16+16L @ PCIe 3		48Contact UsSampling

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