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Unlock the Full Potential of CXL® with Leo Smart Memory Controllers

Learn how Leo CXL® Smart Memory Controllers not only unlock the many exciting benefits of CXL technology, but also deliver server-grade customizable Reliability, Availability and Serviceability, end-to-end security, extensive fleet management capabilities and seamless interoperability with all major CPU, GPU and memory vendors for cloud-scale deployment.

Learn more about Leo CXL Memory Connectivity Platform

First Look: Expanded Leo Smart Memory Controller™ Family

See the new X-Series for fabric-attached KV cache offload and the Leo 2 E-Series and P-Series for CXL 3.2 expansion, pooling, and sharing.

Abhilash Presenting CXL DLRM Demo at OCP Summit 2024 – Astera Labs Video

CXL Memory Innovation at OCP 2025

See CXL memory innovation in action at OCP Global Summit.

Brian Deng – Leo Memory Connectivity Platform First Look Demo

AI Open Rack Demo at OCP 2025

See the demo of Astera Labs' AI Open Rack, featuring the compute platform and switch platform.

Michael on Leo Memory Connectivity Platform First Look Demo

Interop Testing with Linux Operating Systems and Leo

Learn how Astera Labs is enabling the CXL ecosystem with software support to support disaggregated memory architectures.

Ahmed Presenting Leo CXL Memory Platform at OCP Summit – First Look Demo

CXL Demo for DLRM at OCP Summit 2024

See how Leo and 5th Gen AMD EPYC processors deliver a 70% performance boost for DLRM with CXL.

Aanchal Presenting Booth Tour at OCP Global Summit 2024

OCP Global Summit Booth Tour

Take a 360 degree tour of Astera Labs' booth at OCP Global Summit 2024.