Backplane Conditioning

Close high-speed PCIe® 6 and 7 links across dense AI backplanes with power-optimized, low-latency signal conditioning.

Similar Solutions

Challenges

  • Backplane channels accumulate insertion loss across PCB trace, one or more high-density connectors, and the backplane itself, making them more susceptible to loss than an equivalent direct-cable connection
  • At PCIe 6 (64 GT/s) and PCIe 7 (128 GT/s) with PAM4 signaling, that accumulated loss, along with connector-driven reflections and crosstalk, degrades the eye and pushes many backplane links beyond the reach of passive copper
  • Dense AI racks operate at the limits of their power and thermal budgets, leaving little headroom for signal conditioning on the hundreds of links routed across a backplane
  • Latency-sensitive GPU-to-GPU and accelerator-to-switch traffic cannot absorb added latency on every hop, so any signal conditioning in the path must be near-transparent
  • Backplane real estate is physically constrained by common connector column pitch and thick, multi-layer PCBs, limiting where and how signal conditioning can be placed

Solution: Aries PCIe Smart Redriver

  • Purpose-built for moderate-reach PCIe backplane channels, extending reach across dense connectors where passive copper falls short
  • Fully analog signal conditioning that keeps power consumption and added latency low, fitting the tight budgets of dense AI racks
  • Protocol-transparent operation that becomes part of the passive channel without participating in the PCIe protocol for simple, plug-and-play integration
  • Real-time signal-quality monitoring and auto-adaptive equalization managed through Astera Labs’ COSMOS suite for reliable operation and simplified tuning