Cloud-Scale Interop Lab – Design with Confidence
At Astera Labs, we understand that plug-and-play interoperability is critical for systems running data-intensive workloads in the cloud. For this reason, we rigorously test our Aries Smart Retimer portfolio for interoperability with all major root complexes and PCIe® endpoints – making it the most widely tested PCIe 4.0 and 5.0 retimer solution on the market. It is the high standard our customers demand, and we are proud to deliver it.
Why We Test
Interoperability testing of PCIe retimers is critical for HPC and cloud applications. New compute-intensive workloads – such as Artificial Intelligence and Machine Learning – are becoming more mainstream in the enterprise data center, and require an array of high-performance, low-latency devices connected to the PCIe bus that adds to overall system complexity.
Cloud-Scale Interop Lab - How We Test
Aries Smart Retimers are rigorously tested with all major root complexes and an ever-increasing range of PCIe endpoints to ensure seamless interoperation and low-risk designs. Each device is put through our exhaustive testing regime that uses the latest PCIe 4.0 systems from Intel and AMD to exercise the PCIe link to the target endpoint with a battery of tests over thousands of iterations.
Bulletin #1: Interop Testing for Popular Endpoints
In our first Interop Bulletin, we highlight the initial set of enterprise PCIe 4.0 endpoints featured in the Aries PCIe Smart Retimer Interop Report and dive into some customer use cases that require unique test setups for specific device functionalities.
Check in frequently for updates from our Interop engineering team on the latest devices and use cases guiding our testing operations.
Bulletin #2: Interop Testing for Enterprise NVMe SSD Deployments
In Interop Bulletin #2, we focus on PCIe 4.0 NVMe drives and detail some of the specific interop test cases required by our enterprise customers. Topics include how NVMe drives fit into cloud server architectures, customer mix-and-match interop demands and specific Aries Smart Retimer capabilities that are vital for optimal NVMe drive operation.
Bulletin #3: Implement Complex PCIe Topologies with Switches, SRIS Clocking & Aries Smart Retimers
Interop Bulletin #3 explores the topic of PCIe switches and reviews why certain complex system topologies involving switches need retimers to achieve optimal link performance. Specifically, we demonstrate how Aries PCIe Smart Retimers support SRIS to ensure proper PCIe 4.0 data speeds in a scenario that includes a CPU to a retimer card to a switch within a JBOF.
Astera Labs offers tailored performance and interoperability testing services to address each of our partners’ specific PCIe retimer integration needs. Contact us to learn more about our customizable testing services.