Astera Labs Accelerates Time-to-Market With Proven and High-Volume Interoperable Solutions
We’ve recently hit a new milestone on our journey to deliver “AI Your Way” to hyperscalers and AI model labs through continued commitment to open scale-up standards and broad interoperability. Astera Labs’ high-volume Scorpio™ Smart Fabric Switches and Aries Smart Retimers have passed PCI-SIG® compliance testing for PCIe® 6 at the specification’s first-ever compliance workshop for this generation.
Passing on the first attempt is a strong signal of design maturity. This was the industry’s first-ever PCIe 6.x compliance workshop, testing entirely new PAM4 signaling against a rigorous set of electrical, configuration, link-protocol, and transaction-protocol checks, with no established playbook to follow.
This means our silicon meets the high bar this rigorous consortium of industry leaders sets for interoperability, and it further cements our role as a provider of the foundational connectivity layer for the next generation of AI infrastructure.
What Is PCI-SIG Compliance?
PCI-SIG, the standards body that governs the PCI Express® (PCIe) specification, runs Compliance Workshops that put products through various stringent tests.
Interoperability testing confirms real-world link-up and stable operation between multiple PCI-SIG members’ products. To pass, our Scorpio and Aries products had to demonstrate interoperability with more than 20 member devices.
Compliance testing runs products against PCI-SIG test modules. Within compliance testing, specific electrical, configuration, link protocol, and transaction protocol tests are administered; a device must pass all of them to be formally labeled as compliant.
Passing this rigorous battery of tests, as our Scorpio Smart Fabric Switches and Aries Smart Retimers have, confirms a device behaves correctly not just in isolation, but as a reliable option for customers across the broader PCIe ecosystem.
Why PCI-SIG Compliance Matters to Hyperscalers and AI Labs
PCIe 6 is the vital high-speed, low-power protocol underpinning next-generation scale-up architectures, and passing PCI-SIG compliance demonstrates our products meet that bar on the industry’s own terms, not just our own. This reduces qualification risk and increases confidence that PCIe 6 scale-up platforms built with Astera Labs connectivity silicon will interoperate predictably in multi-vendor environments, which is expected to give hyperscalers and AI labs the confidence to deploy our high-radix Smart Fabric Switches and Smart Retimers as viable, essential components for maximizing GPU utilization across today’s scale-up fabrics.
Just as importantly, it signals our ongoing commitment to rigorous interoperability testing that extends the reach and impact of the broader ecosystem, helping unlock PCIe 6 adoption for partners building the next wave of AI systems. That commitment, sustained from this generation to the next, is what positions Astera Labs as a strategic partner for customers’ current and future product roadmaps, rather than a single-cycle vendor.
Open Standard Compliance Is the Backbone of “AI Your Way”
“AI Your Way” is our philosophy to deliver rack-scale connectivity solutions tailored to any workload and any architecture. Delivering on that philosophy requires the highest level of rigor across open protocols because flexibility is only meaningful if the underlying components are proven to interoperate. Achieving PCI-SIG compliance for our PCIe 6 Smart Fabric Switch and Smart Retimer portfolio is a concrete demonstration of that rigor and another step in giving customers the freedom to build AI infrastructure on their own terms, backed by silicon that meets the industry’s most exacting open standards.
Achieving PCI-SIG compliance for our PCIe 6 Smart Fabric Switch and Smart Retimer portfolio is a concrete demonstration of that rigor and another step in giving customers the freedom to build AI infrastructure on their own terms, backed by silicon that meets the industry’s most exacting open standards.
Scorpio PCIe 6 Smart Fabric Switches and Aries PCIe 6 Smart Retimers will be added to the PCI-SIG integrator’s list in the upcoming weeks. For more information about how we validate interoperability for our product portfolio, read about how we test our Scorpio and Aries product families.
Forward-Looking Statements
This communication contains certain forward-looking statements regarding Astera Labs’ expectations concerning the capabilities, features and potential benefits of Scorpio Smart Fabric Switches and Aries Smart Retimers, including statements regarding PCI-SIG compliance, performance in customer, vendor and other third-party environments, interoperability with other products and platforms, and the extent to which such testing or compliance may influence customer or vendor confidence in, adoption of, or qualification of our products. Forward-looking statements may be introduced using words such as “confidence,” “continued,” “commitment,” “future,” “journey,” “next,” “positions,” “predictably,” “promise,” “roadmaps,” “will” and variations of such words and similar expressions.
These statements are subject to risks and uncertainties, many of which are beyond the control of Astera Labs, that could cause actual results to differ materially from those expressed or implied in the forward-looking statements, including, among others: the risk that testing results obtained in our, our partners’ or industry-standard test environments may not be replicated in customer, vendor or other third-party environments; the risk that products that achieve PCI-SIG compliance may nevertheless experience interoperability issues, performance variability, implementation challenges or qualification delays in real-world deployments; the risk that customers, vendors or other ecosystem participants may require additional validation, may reach different conclusions regarding interoperability or readiness, or may not derive the level of confidence we expect from testing or compliance results; delays, disruptions or increased costs in development, validation, certification, commercialization or customer deployment; the complexity of designing and implementing products that meet evolving industry standards and support new features and technologies; defects, errata or other product performance issues discovered after testing; claims, litigation or other disputes relating to our products; changes in customer demand, design cycles or purchasing decisions; business, economic, political and/or regulatory conditions or restrictions in our semiconductor and broader industry and the overall economy may deteriorate or change; the actions of our customers may be inconsistent with our expectations; geopolitical and international conflict; and other risks and uncertainties described in Astera Lab’s Form 10-K, Form 10-Q and other filings with the SEC.
Forward-looking statements speak only as of August 4, 2026, the date they were made. Readers are cautioned not to put undue reliance on forward-looking statements, and no person assumes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise, except to the extent that disclosure may be required by law.