The industry’s first CXL memory pooling solution to reduce memory stranding, optimize memory utilization and reduce TCO for cloud servers from Astera Labs.
The industry’s first CXL memory pooling solution to reduce memory stranding, optimize memory utilization and reduce TCO for cloud servers from Astera Labs.
Astera Labs is developing purpose-built data and memory connectivity solutions that remove performance bottlenecks throughout the data center. Our silicon, software, and systems-level solutions based on CXL, PCIe and Ethernet technologies are helping our customers realize the vision of Artificial Intelligence and Machine Learning in the Cloud.
The rise of artificial intelligence (AI) and Generative AI are transforming how we interact with technology. From healthcare to business efficiency and groundbreaking research, AI and Generative AI are making waves. These AI marvels rely on vast amounts of hardware and infrastructure to function. As such, data centers are undergoing a revolution driven by the… Read More »
We have achieved a significant milestone with Leo CXL Smart Memory Controller passing CXL 1.1 compliance testing to join the CXL Consortium Integrators List. This a major step forward for the Leo portfolio, supporting interoperability with a broad range of CXL devices such as hosts, memory devices, protocol analyzers, and exercisers. CXL Compliance: A Commitment… Read More »
Large server deployments for Artificial Intelligence (AI) and general-purpose computing in hyperscale data centers provide enormous benefits in terms of raw compute power, efficiency, and cost amortization. The on-demand nature and low up-front cost of cloud computing is attractive to an increasing number of enterprises. However, managing such a large fleet of systems presents complex… Read More »
Artificial intelligence (AI) is the single most transformative technology impacting everyday lives. Data-intensive AI applications as well as in-memory databases, high performance computing (HPC) and high-performance file systems are driving the need for faster interconnects between CPUs, GPUs, TPUs, DPUs, SmartNICs and FPGAs. Low latency is also critical, especially for memory interconnects. Compute Express Link™… Read More »