Aug 26, 2022
In this video, Aanchal Sharma, Product Manager at Astera Labs, introduces the new Leo Memory Connectivity Platform supporting memory expansion, pooling and sharing with CXL 1.1 and 2.0. Leo is purpose-built for cloud-scale deployment and features customizable RAS, end-to-end security, and fleet management to eliminate memory bandwidth bottlenecks and capacity constraints for compute-intensive workloads, such as AI and ML.
Avinash Sharma, Sr. Director of Field Applications Engineering, walks through an end-to-end demonstration showcasing how the Leo Smart Memory Controllers remove memory bottlenecks by expanding memory bandwidth and capacity for cloud servers. The demo runs an industry-standard application to test and stress the memory connected to two Leo Controllers with a CXL 1.1-enabled Intel® Xeon® processor.
Get your first look and an end-to-end demonstration of Astera Labs Leo Memory Connectivity Platform for CXL™ 1.1 and 2.0, the industry’s first purpose-built solution to support memory expansion, pooling and sharing.
Learn more about CXL technology and Leo CXL Memory platform
CXL from Promise to Reality with Real Silicon on Customer Platforms
Astera Labs is developing purpose-built data and memory connectivity solutions that remove performance bottlenecks throughout the data center. Our silicon, software, and systems-level solutions based on CXL, PCIe and Ethernet technologies are helping our customers realize the vision of Artificial Intelligence and Machine Learning in the Cloud.
Astera Labs Advances CXL Technology Ecosystem
Astera Labs and AMD collaborate to help realize the vision of AI and Machine Learning in the Cloud with 4th Gen AMD EPYC™ Processors
- « Previous
- 1
- 2
- 3
- Next »
Ready to find out more?
Contact us for more information about how you can design with confidence and accelerate your time to market.