Astera Labs’ Flexible CXL Product Suite Enables Low-Latency Memory Expansion

Artificial intelligence (AI) is the single most transformative technology impacting everyday lives. Data-intensive AI applications as well as in-memory databases, high performance computing (HPC) and high-performance file systems are driving the need for faster interconnects between CPUs, GPUs, TPUs, DPUs, SmartNICs and FPGAs. Low latency is also critical, especially for memory interconnects.

Compute Express Link™ (CXL™) technology is a cache-coherent interconnect that provides a high-bandwidth, low-latency connection for more efficient data transfers between processors, accelerators, memory, and more. For cloud and AI servers running memory-intensive workloads, a flexible suite of CXL products is essential to meet application-specific requirements and deliver:

• Higher performance and bandwidth
• Enhanced RAS (Reliability, Availability, and Serviceability)
• Optimized scalability
• Flexible and scalable memory capacity
• Reduced latency
• Improved total cost of ownership

A key component in the CXL product suite is the memory controller. Astera Labs’ versatile Leo CXL Smart Memory Controller is the only memory controller silicon in the market today that supports memory expansion, pooling and sharing to address a wide range of use cases. Leo enables plug-and-play and high performance memory expansion with DDR5-5600 RDIMMs to maximize CPU utilization and reduce total cost of ownership. For data center integrators that want to maximize memory utilization and dataflow efficiency, memory connected to Leo can also be pooled or shared between processing hosts. With server-grade RAS, end-to-end security, and flexible capacity options up to 2TB per device, Leo is a complete soluton that delivers the scalability needed for cloud and AI infrastructure.

Another important product in the CXL suite is the retimer. As more elements such as memory are added to a system, the distance between the CPU and these additional components increases. Astera Labs’ Aries PCIe/CXL Smart DSP Retimers are the most widely deployed retimers on the market today and reliably extend the distances between processing and other components to improve reach, data integrity, and reliability. Depending on the server and system topology, Leo can be directly attached to a CPU or can be attached with one or two Aries retimers. Together, Leo Smart Memory Controllers and Aries Smart DSP Retimers enable hypervisors and cloud service providers to develop scalable solutions with more memory that unleash the full potential of CXL at cloud-scale.

Low Latency Memory Expansion

Leo and Aries are designed from the ground up with low latency datapaths to deliver unprecedented memory expansion with the high performance needed for memory-intensive applications. Performance tests to measure roundtrip latency and bandwidth were completed with the industry standard Memory Latency Checker (MLC) to showcase the scalability and performance of Astera Labs’ CXL product suite. To emulate different server topologies (e.g., intra-enclosure without retimers, inter-enclosure with PCIe cables), measurements were completed with a Leo CXL Smart Memory Controller direct-attached to the CPU and with one or two Aries PCIe/CXL Smart DSP Retimers.

As can be seen in the test results, adding Aries Smart PCIe/CXL DSP Retimers to the system has a minimal impact on latency when compared to direct-attached CXL memory and a negligible impact to bandwidth. Astera Labs’ CXL product suite of memory controllers and retimers enable hypervisors and cloud service providers to seamlessly expand memory while maintaining high bandwidth and low latency.

A Versatile Suite of CXL Tools

Astera Labs’ CXL product portfolio delivers a flexible suite of CXL solutions to meet the memory requirements of data-intensive workloads. These products enable low-latency memory expansion, pooling, and sharing that opens the way to the data center architectures of the future.

Stay tuned for future blogs which will address how Astera Labs’ CXL product suite enables heterogeneous architectures, delivers TCO advantages for pooled/shared memory, and more.