Systems Engineer

Responsible for working with next-generation server board platforms to perform interoperability testing with customer’s PCIe Gen-4 and Gen-5 cards. You will become an expert on Astera Labs products and lead interoperability testing in Asia and work closely with the US engineering team. You will need to have a deep understanding of the PCIe LTSSM and demonstrated ability to learn SoC Architectures at a functional block level.

Overview

Astera Labs Inc. is a fabless semiconductor company who is a leader in developing purpose-built connectivity solutions that remove performance bottlenecks in compute-intensive workloads such as artificial intelligence and machine learning. To support rapid international business growth, we are hiring a Senior Systems Engineer who has deep knowledge of the PCIe LTSSM, experience performing interoperability testing, and likes working hands-on with customers to debug issues in a lab environment. This is an exciting career growth opportunity that will provide the opportunity to set up a new lab that will have leading edge technology including server motherboard platforms, test equipment, etc. You will work with our customer’s engineering R&D teams who are building next generation datacenter hardware for the world’s leading Cloud Service Providers.

Job Description

As an Astera Labs Senior System Engineer, you will need to have a deep understanding of the PCIe LTSSM and a demonstrated ability to learn SoC Architectures at a functional block level. In this role, you will have the opportunity to work with next-generation server board platforms to perform interoperability testing with customer’s PCIe Gen-4 and Gen-5 cards. You will become an expert on Astera Labs products and lead interoperability testing in Asia and work closely with the US engineering teams.

Basic Qualifications

  • BS in electrical engineering. Master’s degree in engineering is preferred.
  • Minimum of 5 years’ experience designing complex SoC/silicon products for Server, Storage, and/or Networking applications.
  • Deep understanding of PCIe LTSSM
  • Demonstrate thorough understanding of SoC Architecture, including embedded microcontroller SoCs
  • Ability to quickly learn Astera Labs’ Retimer product architecture and perform interoperability testing
  • Fluent in Mandarin and English
  • Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!

Required Experience

  • Hands-on, thorough knowledge of high-speed protocols like PCIe, Ethernet, DDR, NVMe, USB, etc.
  • Silicon/System bring-up and debug experience in customer systems.
  • Experience with lab equipment including protocol analyzers and oscilloscopes.
  • A strong background in high-speed board design techniques, and understanding of Data Center systems like Servers, JBOGs/JBODs, Networking switches/routers etc.
  • Firmware development with C-language, scripting with Python or other equivalent programming languages.
  • Development/support for PCIe or Ethernet Switch products.
  • Knowledge of simulation/modeling, schematic capture, and PCB layout tools from Cadence, Altium and others etc.
  • Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis.

Key Job Details

Category:

Locations:
,

Experience:
BSEE/MSEE; 5+ years, 8+ years for senior/lead positions

Similar Job Listings

US Regional Field Applications Engineer

San Francisco Bay Area

Asia Field Applications Engineers

Beijing, Jinan, Shanghai, Taipei

Senior/ Principal Field Application Engineer

San Francisco Bay Area, Texas

Product Applications Engineer

San Francisco Bay Area

Senior Application Engineer

Shanghai, Taipei