Firmware Design Engineer SoC Validation

Responsible for validating Astera SOC and the boards/systems that the ASICs go onto. This would include electrical and functional validation of the SOC interfaces and the board components.

Overview

Astera Labs Inc., a leader in purpose-built connectivity solutions for data-centric systems, is seeking a Senior/ Principal Firmware Engineer in Santa Clara, CA with experience implementing firmware for hardware-software interfaces on Systems on a Chip (SoCs) and microcontroller subsystems utilizing high-speed communications protocols such as PCI-Express (Gen-3 and above), DDR, Ethernet, NVMe, or similar interfaces.

Job Description

The mission of this role is to validate Astera SOC and the boards/systems that the ASICs go onto. This would include electrical and functional validation of the SOC interfaces and the board components. The ideal candidate will be able to architect, implement and deploy diagnostic mechanisms at scale.

Basic Qualifications

  • Strong academic and technical background in electrical engineering. At a minimum, a Bachelor’s in EE or Computer Science is required, and a Master’s is preferred.
  • Minimum 5 years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
  • Minimum 2 years of experience in post-silicon validation and bring up of SOCs that include interfaces like PCIe, SPI, I2C and memory sub-systems.
  • Experience with developing host based or embedded diagnostics for the ASIC and the system.
  • Experience working with logic designers and board designers to validate and verify HW-SW interfaces on complex SoCs.
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer meetings in advance, and to work with minimal guidance and supervision.
  • Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind!
  • Authorized to work in the US and start immediately.

Required Experience

  • Strong C/C++ coding skills.
  • Experience defining detailed validation and diagnostic plans for functional, signal and power validation. work HW and ASIC teams.
  • Experience in system testing, characterization and compliance, margin analysis for SOC peripherals.
  • Experience developing automation scripts and test tools for execution efficiency, repeatability, and reporting.
  • High level of proficiency in Python for automating pre-processors/post-processors and QC.
  • Comfortable using high speed oscilloscopes, logical analyzers and other diagnostic equipment.

Preferred Experience

  • Experience with voltage margining and characterization of systems
  • Knowledge of boot process, bios and Linux on X86 based systems,
  • Experience with DRAM memory sub-systems.

Key Job Details

Category:

Locations:

Experience:
BSEE/MSEE, 5+ years experience.

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