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Home » Applications » PCIe® Riser Cards

PCIe® Riser Cards

Home » Applications » PCIe® Riser Cards

PCIe® Riser Cards

Enabling Multi-Connector, Plug-and-Play Interoperability

Riser Cards 2U / 3U System Block Diagram

RT = Retimer

Requirements & Challenges

  • Form-factor translation to accommodate full-height or half-height PCIe® add-in cards (AICs) in 1U, 2U and 3U systems
  • Server base board requires more x16 CEM slots to support various NIC, HBA, FGPA, and other AICs in heterogeneous compute architecture
  • Passing through an additional connector at PCIe 4.0 and PCIe 5.0 causes more reflections and insertion loss

Aries Retimer Benefits

  • Integrated capacitors reduce total retimer footprint, allowing for retimer use even on 1U riser cards​
  • Extensive interop testing with many NIC, HBA, and FPGA endpoints to ensure plug-and-play interoperability​​
  • Enables robust systems by passing thousands of loop tests with major CPU vendors​
  • Built-in REFCLK buffer reduces total BOM cost by reducing need for additional clock buffers

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Aries Smart Retimers
 Product Brief
Astera Labs PCIe® 4.0, PCIe 5.0, and CXL™ x16 and x8 Low-Latency Smart Retimers

PCIe 5.0

x 8
x 16

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