GPUs and AI Accelerators
Enabling Complex Topologies for Emerging AI/ML Applications
The proliferation of applications for artificial intelligence (AI) has spurred the creation of dedicated hardware platforms like GPU-based accelerator trays or purpose-built semiconductor clusters for machine learning and neural network training.
Machine learning (ML) accelerators need reliable, high-bandwidth, and low-latency connectivity with maximum up-time to keep pace with the influx of data needing to be processed.
RT = Retimer
Requirements & Challenges
- Multiple connectors between CPU, Riser/Backplane, Retimer and Switch can cause reflections and insertion loss which surpass PCIe® 4.0 and PCIe 5.0 specs
- Complex topologies with multiple PCIe links and clocking domains
Aries Retimer Benefits
- Supports PCIe reach extension 36 dB (Gen5) on both Tx & Rx with best-in-class SerDes
- Proven robustness demonstrated through interoperability tests with all major PCIe switch providers
- Extensive interop testing with GPU and AI inference / training SoC suppliers
- Supports separate reference clock to accommodate PCIe interconnect without needing to send REFCLK across the midplane
Products
Product | Documents | Description | Max PCIe Gen | PCIe Lanes | Ordering |
Astera Labs PCIe® 4.0, PCIe 5.0, and CXL™ x16 and x8 Low-Latency Smart Retimers | PCIe 5.0 | x 8 |